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C++ Implementation of FPNN
Skalník, Marek ; Lojda, Jakub (referee) ; Krčma, Martin (advisor)
This thesis deals with implementation of a simulator of neural networks in FPNN. In the thesis is analyzed the functioning of neural networks, implementation in hardware and FPNN. There is analyzed design implementation and the actual implementation of the simulator using multiple threads.
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Acceleration of Neural Networks in FPGA
Krčma, Martin ; Vašíček, Zdeněk (referee) ; Kaštil, Jan (advisor)
This thesis deals with an acceleration of neural networks, which are implemented into the fi eld programmable gate arrays. Two di fferent hardware implementation are presented and compared with each other and confronted with the software implementation. The tools for easy implementation of neural networks in FPGAs are introduced.
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|
| |
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C++ Implementation of FPNN
Skalník, Marek ; Lojda, Jakub (referee) ; Krčma, Martin (advisor)
This thesis deals with implementation of a simulator of neural networks in FPNN. In the thesis is analyzed the functioning of neural networks, implementation in hardware and FPNN. There is analyzed design implementation and the actual implementation of the simulator using multiple threads.
|
|
|
Acceleration of Neural Networks in FPGA
Krčma, Martin ; Vašíček, Zdeněk (referee) ; Kaštil, Jan (advisor)
This thesis deals with an acceleration of neural networks, which are implemented into the fi eld programmable gate arrays. Two di fferent hardware implementation are presented and compared with each other and confronted with the software implementation. The tools for easy implementation of neural networks in FPGAs are introduced.
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